High performance class-D amplifiers
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Owing to its high efficiency, class-D amplifiers play important roles in audio applications. The main focus of this dissertation is to propose a high performance digital input class-D amplifier Integrated Circuit (IC) that satisfies following criteria: 1.Linearity of the output signal in the audio band to avoid harmonic distortion. 2.High timing accuracy for the switching-points of the pulses to give a precise representation of the input level in the mean value of the pulses. 3.Stable power supply for the switching levels. Variations in the switching levels lead to distortions and further modulation products. 4.Sharp edges to create a nearly ideal rectangular form of the pulses. 5.Feedback from the output to cancel errors produced by the power circuitry. 6.Reduced electromagnetic interference. Three different architectures of class-D amplifier have been proposed as the part of this work, and their theoretical verification is done by system-level simulations. The output stage in all of them is driven by Sigma-Delta Modulation (SDM). The first one consists of a delay-line analog-to-digital converter in the feedback. The second architecture achieves the feedback using continuous-time SDM. The third structure does not employ the feedback but suppresses the noise using multi-level output stage. System-level simulations are carried out using MATLAB and SIMULINK. The structures are then taken through the schematic design and layout using the CADENCE design suite. The first design is fabricated through the MOSIS design foundry. The fabricated device is then tested using custom made test PCB and the results of the testing are analyzed.