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dc.creatorKannappan, Karthikeyan
dc.date.available2011-02-18T21:33:13Z
dc.date.issued1989-05
dc.identifier.urihttp://hdl.handle.net/2346/16433en_US
dc.description.abstractNot available
dc.format.mimetypeapplication/pdf
dc.language.isoeng
dc.publisherTexas Tech Universityen_US
dc.subjectProgrammable array logicen_US
dc.titlePartition-based algorithms for PLA folding
dc.typeThesis
thesis.degree.nameM.S.
thesis.degree.levelMasters
thesis.degree.disciplineComputer Science
thesis.degree.grantorTexas Tech University
thesis.degree.departmentComputer Science
dc.degree.departmentComputer Scienceen_US
dc.rights.availabilityUnrestricted.


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