A design of a ternary arithmetic logic unit

The digital industry is at the threshold of a new era in digital design. Current complementary metal oxide semiconductor, CMOS, Integrated Circuit Technology provides a full spectrum of reliable ternary circuits. The CMOS ternary circuits stimulated the growth of multivalued algebras in the areas of synthesis and minimization of ternary functions. The research effort described herein indicates that implementing ternary circuits into an integrated digital design will decrease overall circuit integration without a component density increase. New ternary digital circuits such as an Arithmetic Logic Unit (ALU) provide a predictable increase in computation speed when compared with a binary ALU and the number size. This new high speed ternary ALU may provide the building block in constructing "number crunching" systems for use in weather modeling, nuclear physics computations, and real time digital processing tasks such as speech and image processing, computerized tomography, and air traffic monitors.